View HEF4521B_139494.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC * The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4521B MSI 24-stage frequency divider and oscillator
Product specification File under Integrated Circuits, IC04 January 1995
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
DESCRIPTION The HEF4521B consists of a chain of 24 toggle flip-flops with an overriding asynchronous master reset input (MR), and an input circuit that allows three modes of operation. The single inverting stage (I2/O2) will function as a crystal oscillator, or in combination with I1 as an RC oscillator, or as an input buffer for an external oscillator. Low-power
HEF4521B MSI
operation as a crystal oscillator is enabled by connecting external resistors to pins 3 (VSS') and 5 (VDD'). Each flip-flop divides the frequency of the previous flip-flop by two, consequently the HEF4521B will count up to 224 = 16777216. The counting advances on the HIGH to LOW transition of the clock (I2). The outputs of the last seven stages are available for additional flexibility.
Fig.1 Functional diagram.
FAMILY DATA, IDD LIMITS category MSI See Family Specifications
January 1995
2
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
COUNT CAPACITY
HEF4521B MSI
OUTPUT O18 O19 O20 O21 Fig.2 Pinning diagram. O22 O23 O24 HEF4521BP(N): 16-lead DIL; plastic (SOT38-1) HEF4521BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4521BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America 218 219
COUNT CAPACITY = 262 144 = 524 288
220 = 1 048 576 221 = 2 097 152 222 = 4 194 304 223 = 8 388 608 224 = 16 777 216
FUNCTIONAL TEST SEQUENCE INPUTS MR H I2 L O2 L CONTROL TERMINALS VSS' VDD VDD' VSS OUTPUTS REMARKS O18 to O24 L counter is in three 8-stage sections in parallel mode; I2 and O2 are interconnected (O2 is now input); counter is reset by MR 255 pulses are clocked into I2, O2 (the counter advances on the LOW to HIGH transition) VSS' is connected to VSS the input I2 is made HIGH VDD' is connected to VDD; O2 is now made floating and becomes an output; the device is now in the 224 mode counter ripples from an all HIGH state to an all LOW state
L
VDD
VSS
H
L L L
L H H
L L L
VSS VSS VSS
VSS VSS VDD
H H H
L
VSS
VDD
L
A test function has been included for the reduction of the test time required to exercise all 24 counter stages. This test function divides the counter into three 8-stage sections by connecting VSS' to VDD and VDD' to VSS. Via I2 (connected to O2) 255 counts are loaded into each of the 8-stage sections in parallel. All flip-flops are now at a HIGH state.
The counter is now returned to the normal 24-stage in series configuration by connecting VSS' to VSS and VDD' to VDD. One more pulse is entered into input I2, which will cause the counter to ripple from an all HIGH state to an all LOW state.
January 1995
3
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... January 1995 4 Fig.3 Logic diagram; for schematic diagram of clock circuit see Fig.4. Philips Semiconductors
24-stage frequency divider and oscillator HEF4521B MSI
Product specification
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
HEF4521B MSI
Fig.4 Schematic diagram of clock input circuitry.
AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays I2 O18 HIGH to LOW 5 10 15 5 LOW to HIGH On On + 1 HIGH to LOW 10 15 5 10 15 5 LOW to HIGH MR On HIGH to LOW I1 O1 HIGH to LOW 10 15 5 10 15 5 10 15 5 LOW to HIGH 10 15 tPLH tPHL tPHL tPLH tPHL tPLH tPHL 950 350 220 950 350 220 40 15 10 40 15 10 120 55 40 90 35 25 60 30 20 1900 700 440 1900 700 440 80 30 20 80 30 20 240 110 80 180 70 50 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 923 ns + (0,55 ns/pF) CL 339 ns + (0,23 ns/pF) CL 212 ns + (0,16 ns/pF) CL 923 ns + (0,55 ns/pF) CL 339 ns + (0,23 ns/pF) CL 212 ns + (0,16 ns/pF) CL 13 ns + (0,55 ns/pF) CL 4 ns + (0,23 ns/pF) CL 2 ns + (0,16 ns/pF) CL 13 ns + (0,55 ns/pF) CL 4 ns + (0,23 ns/pF) CL 2 ns + (0,16 ns/pF) CL 93 ns + (0,55 ns/pF) CL 44 ns + (0,23 ns/pF) CL 32 ns + (0,16 ns/pF) CL 63 ns + (0,55 ns/pF) CL 24 ns + (0,23 ns/pF) CL 17 ns + (0,16 ns/pF) CL 33 ns + (0,55 ns/pF) CL 19 ns + (0,23 ns/pF) CL 12 ns + (0,16 ns/pF) CL SYMBOL MIN. TYP. MAX. TYPICAL EXTRAPOLATION FORMULA
January 1995
5
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
HEF4521B MSI
TYPICAL EXTRAPOLATION FORMULA ns ns ns ns ns ns 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL
VDD V Output transition times HIGH to LOW 5 10 15 5 LOW to HIGH 10 15
SYMBOL
MIN.
TYP. 60
MAX. 120 60 40 120 60 40
tTHL
30 20 60
tTLH
30 20
AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns VDD V Minimum I2 pulse width; HIGH Minimum MR pulse width; HIGH Recovery time for MR Maximum clock pulse frequency 5 10 15 5 10 15 5 10 15 5 10 15 fmax tRMR tWMRH tWI2H SYMBOL MIN. 80 40 30 70 40 30 20 15 15 6 12 17 TYP. 40 20 15 35 20 15 -10 -5 0 12 25 35 MAX. ns ns ns ns ns ns ns ns ns MHz MHz MHz see also waveforms Fig.5
VDD V Dynamic power dissipation per package (P) 5 10 15
TYPICAL FORMULA FOR P (W) 1 200 fi + (foCL) x VDD2 5 100 fi + (foCL) x 13 050 fi + (foCL) x VDD2 VDD2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) (foCL) = sum of outputs VDD = supply voltage (V)
January 1995
6
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
HEF4521B MSI
Fig.5 Waveforms showing minimum pulse widths for MR and I2, recovery time for MR.
January 1995
7
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
APPLICATION INFORMATION
HEF4521B MSI
(1) Optional for low power operation.
Fig.6 Crystal oscillator circuit.
Typical characteristics for crystal oscillator circuit (Fig.6): 500 kHz CIRCUIT Crystal characteristics resonance frequency crystal cut equivalent resistance; RS External resistor/capacitor values Ro CT CS 47 82 20 750 82 20 k pF pF 500 S 1 50 N 6,2 kHz - k 50 kHz CIRCUIT UNIT
January 1995
8
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
HEF4521B MSI
Fig.7
RC oscillator circuit;
1 f ----------------------------------- ; R S 2 R TC, in which: 2,3 x R TC x C f in Hz, R in , C in F. V IL max R S + R TC < ----------------I LI ( maximum input voltage LOW ) ( input leakage current )
RTC; C = 1 nF; RS 2 RTC C; RTC = 56 k; RS = 120 k
Fig.8
Oscillator frequency as a function of RTC and C; VDD = 10 V; test circuit is Fig.7.
January 1995
9
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
HEF4521B MSI
Fig.9
Test set-up for measuring forward transconductance gfs = dio/dvi at vo is constant (see also graph Fig.10).
A: average, B: average + 2 s, C: average - 2 s, in which: `s' is the observed standard deviation.
Fig.10 Typical forward transconductance gfs as a function of the supply voltage at Tamb = 25 C.
January 1995
10
Philips Semiconductors
Product specification
24-stage frequency divider and oscillator
HEF4521B MSI
Fig.11 Voltage gain VO/VI as a function of supply voltage.
Fig.12 Supply current as a function of supply voltage.
Fig.13 Test set-up for measuring graphs of Figs 11 and 12.
January 1995
11

▲Up To Search▲

Price & Availability of HEF4521B

	To Download HEF4521B Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .